@license MIT License More...

#include "../../PmicIrqBase.hpp"
#include "../../../platform/SensorCommWrapper.hpp"

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Classes
class	AXP1xxIrq< Regs >

Detailed Description

@license MIT License

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Author: Lewis He (lewis.nosp@m.he@o.nosp@m.utloo.nosp@m.k.co.nosp@m.m)

Date: 2026-04-28

AXP192/AXP202 Interrupt Controller Interface

This template class manages the five interrupt status and enable registers (INTSTS1-5 / ENABLE1-5). It provides:

Bitmask constants for all supported interrupt sources
Static helper methods to decode which interrupts are active
Runtime enable/disable and read/clear operations

Interrupt sources are grouped by register:

INTSTS1 (bits 0-7): ACIN, VBUS events
INTSTS2 (bits 8-15): Battery events
INTSTS3 (bits 16-23): Temperature, voltage, PEK key
INTSTS4 (bits 24-31): N-oe, VBUS session, low voltage
INTSTS5 (bits 32-39): Watchdog, GPIO edge triggers

Chip support annotation convention: [AXP192+AXP202] = shared by both chips [AXP202 only] = AXP202-specific, reserved/unused on AXP192

AXP192 naming aliases are provided for compatibility with the legacy XPowersLib API.

Template Parameters

Regs	Register map struct type (AXP192Regs or AXP202Regs)

Definition in file AXP1xxIrq.hpp.

Classes

Detailed Description